56F8014 datasheet(74/124 Pages) FREESCALE

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56F8014 Technical Data, Rev. 3

Freescale Semiconductor

Preliminary

6.3.9.2

Reserved—Bit 14

This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.

6.3.9.3

Analog-to-Digital Converter IPBus Clock Enable (ADC)—Bit 13

Each bit controls clocks to the indicated peripheral.

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

•

1 = Clocks are enabled

6.3.9.4

Reserved—Bits 12–7

This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.

6.3.9.5

Timer IPBus Clock Enable (TMR)—Bit 6

Each bit controls clocks to the indicated peripheral.

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

•

1 = Clocks are enabled

6.3.9.6

Reserved—Bit 5

This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.

6.3.9.7

SCI IPBus Clock Enable (SCI)—Bit 4

Each bit controls clocks to the indicated peripheral.

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

•

1 = Clocks are enabled

6.3.9.8

Reserved—Bit 3

This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.

6.3.9.9

SPI IPBus Clock Enable (SPI)—Bit 2

Each bit controls clocks to the indicated peripheral.

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

•

1 = Clocks are enabled

6.3.9.10

Reserved—Bit 1

This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.

6.3.9.11

PWM IPBus Clock Enable (PWM)—Bit 0

Each bit controls clocks to the indicated peripheral.

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

•

1 = Clocks are enabled

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