DSP56857 datasheet(210/662 Pages) FREESCALE

210 / 662 page

5685X Digital Signal Controller User Manual, Rev. 4

8-32

Freescale Semiconductor

8.7.17 Interrupt Vector Map

Table 8-3 provides the list of interrupt vectors on the 56853 through 858 devices. As noted in the

table, the total vector table size is 128 vectors or 256 words of memory. This table also provides

the allowable priority range or fixed priority for each IRQ.

Table 8-3. Interrupt Vector Table Contents

Peripheral

Vector

Number

Priority

Level

Vector

Base

Address +

Interrupt Function

Chip

Exceptions

Core

P:$00

Reserved

Core

P:$02

Reserved

Core

P:$04

Illegal Instruction

—

Core

P:$06

SW Interrupt 3

—

Core

P:$08

HW Stack Overflow

—

Core

P:$0A

Misaligned Long Word Access

—

Core

1-3

P:$0C

EOnCE Step Counter

—

Core

1-3

P:$0E

EOnCE Breakpoint Unit 0

—

Core

1-3

P:$10

Reserved

Core

1-3

P:$12

EOnCE Trace Buffer

—

Core

1-3

P:$14

EOnCE Transmit Register Empty

—

Core

1-3

P:$16

EOnCE Receive Register Full

—

Core

0-3

P:$18

Reserved

Core

0-3

P:$1A

Reserved

Core

P:$1C

SW Interrupt 2

—

Core

P:$1E

SW Interrupt 1

—

Core

P:$20

SW Interrupt 0

—

Core

0-2

P:$22

IRQA

—

Core

0-2

P:$24

IRQB

—

Core

0-2

P:$26

Reserved

PLL

0-2

P:$28

PLL Loss Of Lock

—

0-2

P:$2A

Reserved

DMA

0-2

P:$2C

DMA_DONE 0

—

DMA

0-2

P:$2E

DMA_DONE 1

—

DMA

0-2

P:$30

DMA_DONE 2

—

DMA

0-2

P:$32

DMA_DONE 3

—

DMA

0-2

P:$34

DMA_DONE 4

—

DMA

0-2

P:$36

DMA_DONE 5

—

ESSI 0

0-2

P:$38

ESSI 0 Receive Data with Exception Status

—

ESSI 0

0-2

P:$3A

ESSI 0 Receive Data

—

ESSI 0

0-2

P:$3C

ESSI 0 Receive Last Slot

—

ESSI 0

0-2

P:$3E

ESSI 0 Transmit Data with Exception Status

—

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