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DSP56857 데이터시트(PDF) 62 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 662 page ![]() Peripheral Descriptions 5685X Digital Signal Controller User Manual, Rev. 4 1-30 Freescale Semiconductor 1.12.4 Enhanced Synchronous Serial Interface (ESSI) The ESSI is a full-duplex, serial port designed to allow digital signal controllers (DSCs) to communicate with a variety of serial devices, including industry-standard codecs, other DSCs, and microprocessors. It is typically used to transfer samples in a periodic manner. The ESSI consists of independent transmitter and receiver sections with independent clock generation and frame synchronization. ESSI features include: • Independent (asynchronous) or shared (synchronous) transmit and receive sections with separate or shared internal/external clocks and frame syncs • Normal mode operation using frame sync • Network mode operation allowing multiple devices to share the port with as many as 32-time slots • Network mode enhancements — time slot mask registers (receive and transmit) — end of frame interrupt • Programmable internal clock divider • Programmable word length (8, 10, 12, or 16 bits) • Program options for frame sync and clock generation • ESSI power-down feature • Audio enhancements — three transmitters per ESSI (for six-channel surround sound) 1.12.5 Quad Timer (TMR) Module Each chip in the 56800E family contains a general purpose 16-bit TMR module. The Quad Timer (TMR) module has four external signals capable of being used as either inputs or outputs. They may also be used to interface to the Peripheral Bus. The 855 has only one external signal. TMR features include: • Four, 16-bit counters/timers • Count up/down • Counters are cascadable • Programmable count modulo • Max count rate equals peripheral clock/2 for external clocks • Max count rate equals peripheral clock for internal clocks • Count once or repeatedly |
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