DSP56857 datasheet(222/662 Pages) FREESCALE

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Signal Description

5685X Digital Signal Controller User Manual, Rev. 4

9-4

Freescale Semiconductor

Table 9-2. DMA IPBus Signals

Name

Type

Function

Clock Domain

IPBUS_CLK

Input

IPBus Clock

—

IPBUS_ADDR[2:0]

Input

DMA IPBus Register Select

IPBUS_CLK

IPBUS_DATA_IN[15:0]

Input

Write data from IPBus to DMA registers

IPBUS_CLK

IPBUS_DATA_OUT[15:0]

Output

Read data to IPBus from DMA registers

IPBUS_CLK

IPBUS_R/W

Input

IPBus read/write signal

IPBUS_CLK

IPBUS_SEL

Input

Select signal for DMA Controller

IPBUS_CLK

IPBUS_REQ[30:0]

Input

DMA request signal from IPBus peripheral

IPBUS_CLK

DMA_INTR

Output

DMA interrupt request signal (active low)

IPBUS_CLK

IP_PHASE

Input

Data signal indicating IPBus phase

SYS_CLK

Table 9-3. DMA X1 Bus Signals

Name

Type

Function

Clock Domain

SYS_CLK

Input

System Clock

—

X1_BUS_REQUEST

Output

DMA request to System Bus Controller (SBC)

SYS_CLK

X1_BUS_GRANT

Input

DMA grant signal from SBC

SYS_CLK

X1_ADDR_OUT[23:0]

Output

DMA-provided data space address

SYS_CLK

X1_W_DATA[31:0]

Output

DMA-provided data

SYS_CLK

X1_W

Output

DMA system bus write signal

SYS_CLK

X1_R_DATA[31:0]

Input

SBC-provided system bus read data

SYS_CLK

X1_R

Output

DMA system bus read signal

SYS_CLK

X1_SIZE

Output

Size of data written (byte, word, long)

SYS_CLK

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