DSP56857 datasheet(227/662 Pages) FREESCALE

227 / 662 page

Direct Memory Access (DMA), Rev. 4

Freescale Semiconductor

9-9

9.6.1.5 Reserved—Bits 11–9

These bits are reserved or not implemented. They are read as, and written with 0s.

9.6.1.6 Peripheral Select (PERIPH_SEL)—Bits 8–4

This five-bit field selects one of 16 possible DMA peripherals. Table 9-10 illustrates the

peripheral selected for each setting of this field. When the DMA is enabled, the peripheral chosen

by this field controls the start of the DMA operation. That is, when the selected DMA_REQ

[PERIPHERAL SELECT] line is asserted, the DMA operation begins.

Note:

If PERIPHERAL SELECT is equal to zero, DMA operation begins immediately after

DMA operation is enabled (via asserting the DMA ON bit). This mechanism may be

used for memory-to-memory transfers. If a peripheral-to-peripheral DMA transfer is

desired, PERIPHERAL SELECT should be set to the slower of the two peripherals to

prevent data overruns.

Note:

Whenever doing DMA transfers with peripherals, DATASIZE should be set as word

mode.

Table 9-10. DMA_REQ Connections

DMA_REQ Line

Peripheral

Transfer Control

Select Field

HI8 High Transmitter

HI8 High Receiver

ESSI1 Transmitter 2

ESSI1 Transmitter 1

ESSI1 Transmitter 0

ESSI1 Receiver

ESSI0 Transmitter 2

ESSI0 Transmitter 1

ESSI0 Transmitter 0

ESSI0 Receiver

SCI1 Transmitter

SCI1 Receiver

SCI0 Transmitter

SCI0 Receiver

SPI Transmitter

SPI Receiver

DSP56857 데이터시트(PDF) 227 Page - Freescale Semiconductor, Inc