| 전자부품 데이터시트 검색엔진 |
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DSP56857 데이터시트(PDF) 385 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 385 Page - Freescale Semiconductor, Inc |
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385 / 662 page ![]() Interrupts Quad Timer (TMR), Rev. 4 Freescale Semiconductor 13-19 13.11.2 Timer Overflow Interrupts These interrupts are generated when a counter rolls over its maximum value while the TCFIE bit is set in the TMR_SCR. These interrupts are cleared by writing 0 to the Timer Overflow Flag (TOF) bit of the appropriate TMR_SCR. 13.11.3 Timer Input Edge Interrupts These interrupts are generated by a transition of the input signal (either positive or negative depending on IPS setting) while the Input Edge Flag Interrupt Enable (IEFIE) bit is set in the TMR_SCR. These interrupts are cleared by writing 0 to the IEF bit of the appropriate TMR_SCR. |
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