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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56857 데이터시트(PDF) 403 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 403 Page - Freescale Semiconductor, Inc |
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403 / 662 page  Block Diagram General Purpose Input/Output (GPIO), Rev. 4 Freescale Semiconductor 15-3 15.1 Introduction The 5685x General Purpose Input/Output (GPIO) is designed to share package pins with other peripheral modules on the chip. If a peripheral normally controls a given pin is not required, that pin then can be programmed to be a GPIO with programmable pull-up. 15.2 Features The GPIO module design includes these distinctive features: • Individual control for each pin to be in either Normal or GPIO mode • Individual direction control for each pin in GPIO mode • Individual pull-up enable control for each pin in either Normal or GPIO mode except for MODA, B, and C pins because pull-ups are always disabled 15.3 Block Diagram Figure 15-1. Bit-Slice View of GPIO Logic D_in D_out 0 1 Peripheral Data Out PE 0 1 Peripheral Data In PE 0 1 DD PU Peripheral Out Enable I/O Cell Data Register PE DD GPIO pin |
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