| 전자부품 데이터시트 검색엔진 |
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DSP56857 데이터시트(PDF) 473 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 473 Page - Freescale Semiconductor, Inc |
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473 / 662 page ![]() JTAG Boundary Scan Register (BSR) JTAG Port, Rev. 4 Freescale Semiconductor 17-11 17.6 Bypass Register (BYPASS) The JTAG bypass register is a one-bit register used to provide a simple, direct path from the TDI pin to the TDO pin. This is useful in boundary scan applications where many chips are serially connected in a daisy-chain. Individual DSCs, or other devices, can be programmed with the BYPASS instruction so individually they become pass-through devices during testing. This allows testing of a specific chip, while still having all of the chips connected through the JTAG ports. Figure 17-5. JTAG Bypass Register (JTAGBR) 17.7 JTAG Boundary Scan Register (BSR) The JTAG Boundary Scan Register (BSR) is configured as described in Figure 17-6. This register is enabled via the JTAG Master TAP by issuing the EXTEST, or SAMPLE_PRELOAD instructions enabling the boundary scan registers between TDI and TDO. Boundary Scan Register cell number one is connected to TDO making it the first data bit shifted into TDI. It is the first bit shifted out of TDO when loading and unloading the boundary scan chain. For the most current BSDL files, please refer to www.freescale.com. Figure 17-6 illustrates the register, while Table 17-5 provides the contents of the BSR for the 5685x. Figure 17-6. Boundary Scan Register (BSR) Table 17-4. Device ID Register Bit Assignment Bit No. Code Use 56853/854/855/857/858 Values 31–28 Version Number 0000 (For initial version only—these bits may vary) 27–22 Design Center ID 00 0111 21–12 Family and part ID 11 0101 1010 11-1 Manufacturer ID 000 0000 1110 0 IEEE Requirement Always 1 IR = $0, $1, $3 337 336 335 334 333 Bits 332 through 5 4321 0 Read-Only IR = $6, $7, $FF Read/Write Reset 0 |
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