DSP56857 datasheet(155/662 Pages) FREESCALE

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OSC (Oscillator) Circuit Detail

On-Chip Clock Synthesis (OCCS), Rev. 4

Freescale Semiconductor

6-5

6.2.1 Using an External Crystal

Figure 6-3 illustrates the typical application details for using an external crystal. A 4MHz, At

cut, parallel resonant crystal is mounted across XTAL and EXTAL pins. A 1 Mohm bias resistor

is paralleled to that connection. The default path for TIME_CLK generation (the differential

amplifier path) is recommended and therefore CGMCR[TOD] register setting is a don’t care.

Please see Section 6.2.4 for further details.

Figure 6-3. Using an External Crystal

The values of Rs, CL1 and CL2 are determined with assistance of your crystal manufacturer. In

general, CL1 and CL2 are used to pull the crystal to the intended frequency and establish the

Equivalent Series Resistance (ESR). Rs eliminates some of the inverter’s gain (by an amount

appropriate for the resulting ESR).

Note:

The CGMCR register’s TOD_SEL field may be set to either 0 or 1. The recommended

setting of 0 allows very low power operation when executing a STOP instruction.

1 Mohm

EXTAL

CGMCR[TOD_SEL] = 0

Note (1)

BOLD represents default states and typical

conditions.

1) See STOP Mode Features for further

details

2) AT cut quartz crystal or ceramic

resonator. Crystal vendor to supply values

for Rs, CL1 and CL2

Fref

(4 MHz)

TIME_CLK (31.25 KHz)

XTAL

128

(1)

OSC_LOPWR

Notes (1)

Bandwidth

limited

to 4 MHz

4 MHz

Note (2)

CL1

CL2

Ftime

(31.25 KHz)

CGMCR[TOD] = (don’t care)

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