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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56857 데이터시트(PDF) 175 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 175 Page - Freescale Semiconductor, Inc |
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175 / 662 page  Module Memory Map Power-On Reset (POR) and Computer Operating Properly (COP), Rev. 4 Freescale Semiconductor 7-7 7.7 Block Diagram Figure 7-2. COP Module Block Diagram and Interface Signals 7.8 Module Memory Map There are three registers on the COP peripheral described in Table 7-2. Table 7-2. COP Module Memory Map (COP_BASE = $1FFFD0) Address Offset Register Acronym Register Name Access Type Chapter Location Base + $0 COPCTL Control Register Read/Write Section 7.9.1 Base + $1 COPTO Time-Out Register Read/Write Section 7.9.2 Base + $2 COPCTR Counter Register Read/Write Section 7.9.3 Add. Offset Register Name 15 14 13 12 11 10 98765 4321 0 $0 COPCTL R 0 0 0 0 0 0 0 0 0 0 0 BYPS CSEN CWEN CEN CWP W $1 COPTO R TIMEOUT W $2 COPCTR R COUNT W SERVICE R 0 Read as 0 W Reserved Figure 7-3. COP Register Map Summary Counter Registers OSCCLK IPBus CLK IPBus COP_RST IPBus I/F |
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