STC89LE53RC datasheet(16/165 Pages) STC

16 / 165 page

main:

MOV

R3,

;P1 LED increment mode changed

;start to run program

main_loop:

MOV

CPL

MOV

P1,

ACALL delay

INC

MOV

SUBB

#18H

main_loop

MOV

P1,

#0FFH

;close all LED, MCU go into power-down mode

CLR

IT0

;low electrical level trigger external interrupt 0

;

SETB

IT0

;negative edge trigger external interrupt 0

SETB

EX0

;enable external interrupt 0

CLR

IT1

;low electrical level trigger external interrupt 1

;

SETB

IT1

;negative edge trigger external interrupt 1

SETB

EX1

;enable external interrupt 1

SETB

;set the global enable

;if don't so, power-down mode cannot be wake up

;MCU will go into idle mode or power-down mode after the following instructions

MOV

PCON, #00000010B

;Set PD bit, power-down mode (PD = PCON.1)

;

NOP

;

NOP

;

NOP

;

MOV

PCON, #00000001B

;Set IDL bit, idle mode (IDL = PCON.0)

MOV

P1,

#0DFH

;1101,1111

NOP

WAIT1:

SJMP

WAIT1

;dynamically stop

END

2.2 RESET Control

In STC89xx series, there are 5 sources to generate internal reset. They are RESET pin, On-chip power-on-reset,

Watch-Dog-Timer, software reset, and On-chip MAX810 POR timing delay.

2.2.1 Reset pin

The RST pin, which is the input to Schmitt Trigger, is input pin for chip reset. A level change of

RESET pin have to keep at least 24 cycles plus 10us in order for CPU internal sampling use. When

this signal is brought high for at least two machine cycles plus 10 us, the internal registers are loaded

with appropriate values for an orderly system start-up. For normal operation, RST is low.

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