STC89LE53RC datasheet(53/165 Pages) STC

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DJNZ <byte>, <rel-addr>

Function:

Decrement and Jump if Not Zero

Description:

DJNZ decrements the location indicated by 1, and branches to the address indicated by the

second operand if the resulting value is not zero. An original value of 00H will underflow to

0FFH. No flags are afected. The branch destination would be computed by adding the signed

relative-displacement value in the last instruction byte to the PC, after incrementing the PC

to the first byte of the following instruction.

The location decremented may be a register or directly addressed byte.

Note: When this instruction is used to modify an output port, the value used as the original

port data will be read from the output data latch, not the input pins.

Example:

Internal RAM locations 40H, 50H, and 60H contain the values 01H, 70H, and 15H,

respectively. The instruction sequence,

DJNZ 40H, LABEL_1

DJNZ 50H, LABEL_2

DJNZ 60H, LABEL_3

will cause a jump to the instruction at label LABEL_2 with the values 00H, 6FH, and 15H in

the three RAM locations. The first jump was not taken because the result was zero.

This instruction provides a simple way of executing a program loop a given number of times,

or for adding a moderate time delay (from 2 to 512 machine cycles) with a single instruction

The instruction sequence,

MOV

R2,#8

TOOOLE:

CPL

P1.7

DJNZ

R2, TOOGLE

will toggle P1.7 eight times, causing four output pulses to appear at bit 7 of output Port 1.

Each pulse will last three machine cycles; two for DJNZ and one to alter the pin.

DJNZ

Rn,rel

Bytes:

Cycles:

Encoding:

1 1 0 1

1 r r r

rel. address

Operation:

DJNZ

(PC) ← (PC) + 2

← (PC) + 2

(PC) + 2

(Rn) ← (Rn) – 1

← (Rn) – 1

(Rn) – 1

IF (Rn) > 0 or (Rn) < 0

THEN

(PC) ← (PC)+ rel

← (PC)+ rel

(PC)+ rel

DJNZ

direct, rel

Bytes:

Cycles:

Encoding:

1 1 0 1

0 1 0 1

direct address

rel. address

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