STC89LE53RC datasheet(110/165 Pages) STC

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SCON register

LSB

bit

name

SM0/FE

SM1

SM2

REN

TB8

RB8

FE: Framing Error bit. The SMOD0 bit must be set to enable access to the FE bit

0: The FE bit is not cleared by valid frames but should be cleared by software.

1: This bit set by the receiver when an invalid stop bit id detected.

SM0,SM1 : Serial Port Mode Bit 0/1.

SM0

SM1

Description

Baud rate

8-bit shift register

SYSclk/12

8-bit UART

variable

9-bit UART

SYSclk/64 or SYSclk/32(SMOD=1)

9-bit UART

variable

SM2 : Enable the automatic address recognition feature in mode 2 and 3. If SM2=1, RI will not be

set unless the received 9th data bit is 1, indicating an address, and the received byte is a

Given or Broadcast address. In mode1, if SM2=1 then RI will not be set unless a valid stop

Bit was received, and the received byte is a Given or Broadcast address. In mode 0, SM2 should be 0.

REN : When set enables serial reception.

TB8 : The 9th data bit which will be transmitted in mode 2 and 3.

RB8 : In mode 2 and 3, the received 9th data bit will go into this bit.

TI : Transmit interrupt flag.

RI : Receive interrupt flag.

SBUF register

LSB

bit

7654321

name

It is used as the buffer register in transmission and reception. The serial port buffer register (SBUF) is really two

buffers. Writing to SBUF loads data to be transmitted, and reading SBUF accesses received data. These are two

separate and distinct registers, the transimit write-only register, and the receive read-only register.

PCON: Power Control register

LSB

bit

name

SMOD

SMOD0

POF

GF1

GF0

IDL

SMOD: double Baud rate control bit.

0 : Disable double Baud rate of the UART.

1 : Enable double Baud rate of the UART in mode 1,2,or 3.

SMOD0: Frame Error select.

0 : SCON.7 is SM0 function.

1 : SCON.7 is FE function. Note that FE will be set after a frame error regardless of the state of SMOD0.

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