AD9929BBCZ datasheet(54/64 Pages) AD

54 / 64 page

AD9929

Rev. A | Page 54 of 64

POWER SUPPLY SEQUENCING

The recommended power-up and power-down sequences are

shown in Figure 64 and Figure 65, respectively. As shown, the

VM1 and VM2 voltage level should never exceed the VH1 and

VH2 voltage level during power-up or power-down. Excessive

current results if this requirement is not met due to a PN

junction diode turning on between the VM1/2 and VH supply

pins.

Figure 63 describes the AD9929 AFETG and V-driver supplies

associated with vertical driver outputs.

TIMING

GENERATOR

XV1

V-DRIVER

LOGIC

XV2

XV3

XV4

XVSG1

XSUBCK

V1 (VH1, VM1, VL)

V2 (VM2, VL)

V3 (VH1, VM1, VL)

V4 (VM2, VL)

SUBCK (VH2, VL)

XVSG2

Figure 63. Block Diagram of AD9929 Showing

Timing Generator and Vertical Driver

RECOMMENDED POWER-UP SUPPLY

SEQUENCING

When the AD9929 is powered up, the following power supply

sequence is recommended. Refer to Figure 64.

Turn ON: VDD, DVDD, DRVDD, HVDD, RGVDD,

TCVDD, and AVDD.

Turn ON: VH1 VH2, VM1,VM2, and VL.

Caution

There is a PN junction diode from VM1 and VM2 to VH.

Excessive current occurs if the VM1 and VM2 supply level is

greater than VH1 and VH2 supplies.

RECOMMENDED POWER-DOWN SUPPLY

SEQUENCING

When the AD9929 is powered down, the following power

supply sequence is recommended. Refer to Figure 65.

Turn OFF: VH1, VH2, VM1, VM2, and VL.

Turn OFF: VDD, DVDD, DRVDD, HVDD, RGVDD,

TCVDD, and AVDD.

VH1 = VH2 = 15.0V

VDD = DVDD = DRVDD = HVDD = RGVDD = TCVDD = AVDD = 3V

VM1 = VM2 = –0.5V

VL = –7.5V

SAME TIME AS VM AND VH OR EARLIER, BUT NOT BEFORE VDD REACHES 3V.

Figure 64. Power-Up Supply Sequencing

VH1 = VH2 = 15.0V

VDD = DVDD = DRVDD = HVDD = RGVDD = TCVDD = AVDD = 3V

VM1 = VM2 = –0.5V

VL = –7.5V

SAME TIME AS VM AND VH OR EARLIER, BUT NOT AFTER VDD.

Figure 65. Power-Down Supply Sequencing

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