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AD9929BBCZ 데이터시트(PDF) 25 Page - Analog Devices

부품명 AD9929BBCZ
상세설명  CCD Signal Processor with Precision Timing Generator
PDF  64 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9929BBCZ 데이터시트(HTML) 25 Page - Analog Devices

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AD9929
Rev. A | Page 25 of 64
Table 16. Precision Timing Edge Locations for RG, H1, SHP, SHD, DCLK, and DOUTPHASE
RG Rising Edge
RG Falling Edge
Signal Name
Quadrant
(Not Programmable)
RGNEGLOC
Quadrant Range
RG
I
fixed at 000000
000000 to 001011
P[0] to P[11]
II
fixed at 000000
010000 to 011011
P[12] to P[23]
III
fixed at 000000
100000 to 101011
P[24] to P[35]
IV
fixed at 000000
P[36] to P[47]
H1 Rising Edge
H1 Falling Edge
Signal Name
Quadrant
H1POSLOC
Quadrant Range
(Not Programmable)
H1
I
000000 to 001011
P[0] to P[11]
H1POSLOC + 24 Steps
II
010000 to 011011
P[12] to P[23]
H1POSLOC + 24 Steps
III
100000 to 101011
P[24] to P[35]
H1POSLOC + 24 Steps
IV
110000 to 111011
P[36] to P[47]
H1POSLOC + 24 Steps
CDS Rising Edge
CDS Falling Edge
Signal Name
Quadrant
SHPLOC
Quadrant Range
SHDLOC
Quadrant Range
CDS
I
000000 to 001011
P[0] to P[11]
000000 to 001011
P[0] to P[11]
II
010000 to 011011
P[12] to P[23]
010000 to 011011
P[12] to P[23]
III
100000 to 101011
P[24] to P[35]
100000 to 101011
P[24] to P[35]
IV
110000 to 111011
P[36] to P[47]
110000 to 111011
P[36] to P[47]
Data Output[9:0] Rising Edge
Data Output[9:0] Falling Edge
Signal Name
Quadrant
DOUTPHASE
Quadrant Range
(Not Programmable)
Data Output [9:0]
I
000000 to 001011
P[0] to P[11]
DOUTPHASE + 24 Steps
II
010000 to 011011
P[12] to P[23]
DOUTPHASE + 24 Steps
III
100000 to 101011
P[24] to P[35]
DOUTPHASE + 24 Steps
IV
110000 to 111011
P[36] to P[47]
DOUTPHASE + 24 Steps
Signal Name
DCLKPHASE Value
DCLK PHASE Rising Edge
DCLKPHASE Falling Edge
DCLK1
00
P[6]
P[26]
01
P[16]
P[36]
10
P[26]
P[06]
11
P[36]
P[16]



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