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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WM8802SCFV 데이터시트(PDF) 19 Page - Wolfson Microelectronics plc |
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WM8802SCFV 데이터시트(HTML) 19 Page - Wolfson Microelectronics plc |
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19 / 65 page  Product Preview WM8802 w PP Rev 1.1 April 2004 19 Master Clock Generator SBCK (O) SLRCK (O) XMCK (O) XTAL Source PLL Source RMCK (O) 512fs / 256fs 256fs / 128fs 128fs / 64fs MUTE 2fs fs fs/2 MUTE RBCK (I/O) RLRCK (I/O) to internal circuits PLL 64fs PLL fs [RCKSEL] ([SELMTD]=1) Master / Slave 128fs 64fs 32fs MUTE 12.288MHz / 24.576MHz 6.144MHz / 12.288MHz MUTE Lock / Unlock [PRSEL] [XRSEL] [PSBCK] [PSLRCK] [XSLRCK] [XMSEL] [SELMTD] 12.288MHz / 24.576MHz 6.144MHz / 12.288MHz 3.072MHz / 6.144MHz MUTE [XRBCK] [XRLRCK] 12.288MHz 6.144MHz 3.072MHz MUTE [XSBCK] 192kHz 96kHz 48kHz MUTE PLL XIN PLL XIN PLL XIN PLL XIN PLL XIN XIN 192kHz 96kHz 48kHz MUTE 12.288MHz 6.144MHz 3.072MHz MUTE 12.288MHz or 24.576MHz 256fs or 512fs TMCK Source 256fs [OCKSEL] ([SELMTD]=0) Figure 7 Clock Output Block Diagram |
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