전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

WM8802SCFV 데이터시트(PDF) 29 Page - Wolfson Microelectronics plc

부품명 WM8802SCFV
상세설명  Digital Audio Interface Transceiver
PDF  65 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8802SCFV 데이터시트(HTML) 29 Page - Wolfson Microelectronics plc

Back Button WM8802SCFV Datasheet HTML 25Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 26Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 27Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 28Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 29Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 30Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 31Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 32Page - Wolfson Microelectronics plc WM8802SCFV Datasheet HTML 33Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 29 / 65 page
background image
Product Preview
WM8802
w
PP Rev 1.1 April 2004
29
DATA
PLL LOCK
ERROR
INPUT PARITY
ERROR (A)
INPUT PARITY
ERROR (B)
INPUT PARITY
ERROR (C)
RDATA output
Low
Low
Previous value data
Output
fs calculation result
Low
Output
Output
Output
Channel status
Low
Low
Previous value data
Previous value data
Validity flag
Low
Low
Output
Output
User data
Low
Low
Output
Output
Table 11 Data Processing upon Error Occurrence
Notes:
1.
Input parity error (A): Occurs 9 or more times in succession
2.
Input parity error (B): Occurs 8 or fewer times in succession, in case of audio data
3.
Input parity error (C): Occurs 8 or fewer times in succession, in case of non-PCM burst data
Figure 20 shows an example of data processing upon occurrence of a parity error.
RERR
RDATA
R-ch
Previous data value
Input Data
RLRCK
An error occurs a single time
Muted after 9 or more
consecutive errors
L-ch R-ch ….
Previous data value
R-2
L-2
R-0
L-1
R-0
L-0
L-2 R-2 L-2 R-2 L-2 R-2 L-2 R-2
L-4
R-3
L-3
R-2
L-2
R-1
R-4 L-5 R-5 L-6 R-6 L-7 R-7 L-8 R-8
L-1
Figure 20 Data Processing Upon Parity Error Occurrence
PROCESSING DURING ERROR RECOVERY
PLL becomes locked and data demodulation begins when preambles B, M and W are detected.
RDATA output data is output from the RLRCK edge after RERR goes Low.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com