V62SLASH12615-01XE-R datasheet(11/98 Pages) TI1

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DP83848-EP

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SLLSEC6E – SEPTEMBER 2012 – REVISED JUNE 2019

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Pin Configuration and Functions

Table 3-9. 10-Mbps and 100-Mbps PMD Interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

TD–, TD+

16, 17

I/O

Differential common driver transmit output (PMD Output Pair). These differential outputs are automatically

configured to either 10BASE-T or 100BASE-TX signaling.

In Auto-MDIX mode of operation, this pair can be used as the Receive Input pair.

These pins require 3.3-V bias for operation.

RD–, RD+

13, 14

I/O

Differential receive input (PMD Input Pair). These differential inputs are automatically configured to accept either

100BASE-TX or 10BASE-T signaling.

In Auto-MDIX mode of operation, this pair can be used as the Transmit Output pair.

These pins require 3.3-V bias for operation.

Table 3-10. Special Connections

TERMINAL

I/O

DESCRIPTION

NAME

NO.

RBIAS

Bias Resistor Connection. A 4.87-kΩ 1% resistor should be connected from RBIAS to GND.

PFBOUT

Power Feedback Output. Parallel caps, 10 µF (Tantalum preferred) and 0.1 µF, should be placed close to the

PFBOUT. Connect this pin to PFBIN1 (pin 18) and PFBIN2 (pin 37). See Section 6.2.1.3 for proper placement pin.

PFBIN1

Power Feedback Input. These pins are fed with power from PFBOUT pin. A small capacitor of 0.1 µF should be

connected close to each pin.

PFBIN2

Note: Do not supply power to these pins other than from PFBOUT.

RESERVED

20, 21

I/O

RESERVED: These pins must be pulled-up through 2.2-kΩ resistors to AVDD33 supply.

Table 3-11. Power Supply Pins

TERMINAL

DESCRIPTION

NAME

NO.

IOVDD33

32, 48

I/O 3.3-V supply

IOGND

35, 47

I/O ground

DGND

Digital ground

AVDD33

Analog 3.3-V supply

AGND

15, 19

Analog ground

GNDPAD

DAP

Thermal pad

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