STR720RBQ6 datasheet(318/401 Pages) STMICROELECTRONICS

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21.3.5

Forced Compare Mode

In this section the index “i” may represent A or B.

Bits 11:8 of CR1 register and bits 7:0 of CR2 are used (Refer to Section 21.4 for detailed

When the FOLVA bit is set, the OLVLA bit is copied to the OCMPA pin if PWM and OPM are

both cleared. When FOLVB bit is set, the OLVLB bit is copied to the OCMPB pin.

The OLVLi bit has to be toggled in order to toggle the OCMPi pin when it is enabled (OCiE

bit=1).

Note

– When FOLVi is set, no interrupt request is generated.

– Nevertheless the OCFi bit can be set if OCiR = Counter, an interrupt can be generated if

enabled.

– Input capture function works in Forced Compare mode.

21.3.6

One Pulse Mode

One Pulse mode enables the generation of a pulse when an external event occurs. This mode

is selected via the OPM bit in the CR1 register.

The one pulse mode uses the Input Capture A function (trigger event) and the Output

Compare A function.

21.3.6.1 Procedure

To use one pulse mode, select the following in the CR1 register:

– Using the OLVLA bit, select the level to be applied to the OCMPA pin after the pulse.

– Using the OLVLB bit, select the level to be applied to the OCMPA pin during the pulse.

– Select the edge of the active transition on the ICAPA pin with the IEDGA bit.

– Set the OCAE bit, the OCMPA pin is then dedicated to the Output Compare A function.

– Set the OPM bit.

– Select the timer clock (ECKGEN) and the prescaler division factor (CC7-CC0).

Load the OCAR register with the value corresponding to the length of the pulse (see the

formula in next Section 21.3.7.1).

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