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CC3235MODASF 데이터시트(PDF) 55 Page - Texas Instruments

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부품명 CC3235MODASF
상세설명  CC3235MODAx SimpleLink??Wi-Fi CERTIFIED??Dual-band Wireless MCU Module
PDF  100 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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CC3235MODASF 데이터시트(HTML) 55 Page - Texas Instruments

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background image
T2
T1
T3
T4
McACLKX
McAFSX
McAXR0/1
T5
T2
T1
T3
T4
McACLKX
McAFSX
McAXR0/1
T4
55
CC3235MODAS, CC3235MODASF
www.ti.com
SWRS233 – OCTOBER 2019
Submit Documentation Feedback
Product Folder Links: CC3235MODAS CC3235MODASF
Specifications
Copyright © 2019, Texas Instruments Incorporated
(1)
Timing parameter assumes a maximum load of 20 pF.
5.19.5.2 I2S
The McASP interface functions as a general-purpose audio serial port optimized for multichannel audio
applications and supports transfer of two stereo channels over two data pins. The McASP consists of
transmit and receive sections that operate synchronously and have programmable clock and frame-sync
polarity. A fractional divider is available for bit-clock generation.
5.19.5.2.1 I2S Transmit Mode
Figure 5-10 shows the timing diagram for the I2S transmit mode.
Figure 5-10. I2S Transmit Mode Timing Diagram
Table 5-15 lists the timing parameters for the I2S transmit mode.
Table 5-15. I2S Transmit Mode Timing Parameters
ITEM
NAME
DESCRIPTION
MIN
MAX
UNIT
T1
fclk
(1)
Clock frequency
9.216
MHz
T2
tLP(1)
Clock low period
1/2 fclk
ns
T3
tHT
(1)
Clock high period
1/2 fclk
ns
T4
tOH
(1)
TX data hold time
22
ns
(1)
Timing parameter assumes a maximum load of 20 pF.
5.19.5.2.2 I2S Receive Mode
Figure 5-11 shows the timing diagram for the I2S receive mode.
Figure 5-11. I2S Receive Mode Timing Diagram
Table 5-16 lists the timing parameters for the I2S receive mode.
Table 5-16. I2S Receive Mode Timing Parameters
ITEM
NAME
DESCRIPTION
MIN
MAX
UNIT
T1
fclk
(1)
Clock frequency
9.216
MHz
T2
tLP(1)
Clock low period
1/2 fclk
ns
T3
tHT
(1)
Clock high period
1/2 fclk
ns
T4
tOH
(1)
RX data hold time
0
ns
T5
tOS
(1)
RX data setup time
15
ns



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