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LPC47M14X 데이터시트(PDF) 158 Page - SMSC Corporation

부품명 LPC47M14X
상세설명  128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB
PDF  205 Pages
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제조업체  SMSC [SMSC Corporation]
홈페이지  http://www.smsc.com
Logo SMSC - SMSC Corporation

LPC47M14X 데이터시트(HTML) 158 Page - SMSC Corporation

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SMSC DS – LPC47M14X
Page 158
Rev. 03/19/2001
REGISTER
ADDRESS
DESCRIPTION
STATE
Chip Level
Vendor Defined
0x25
Reserved - Writes are ignored, reads return 0.
Configuration
Address Byte 0
Default
=0x2E (Sysopt=0)
=0x4E (Sysopt=1)
on VCC POR and
HARD RESET
0x26
Bit[7:1] Configuration Address Bits [7:1]
Bit[0] = 0
See Note 2
C
Configuration
Address Byte 1
Default = 0x00
on VCC POR and
HARD RESET
0x27
Bit[7:0] Configuration Address Bits [15:8]
See Note 2
C
Default = 0x00
on VCC POR,
SOFT RESET and
HARD RESET
0x28
Bits[7:0] Reserved - Writes are ignored, reads return
0.
Chip Level
Vendor Defined
0x29
Reserved - Writes are ignored, reads return 0.
TEST 6
Default = 0x00, on
VCC POR and
VTR POR
0x2A R/W
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
TEST 4
Default = 0x00, on
VCC POR and
VTR POR
0x2B R/W
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
C
TEST 5
Default = 0x00, on
VCC POR and
VTR POR
0x2C R/W
Bit[7] Test Mode: Reserved for SMSC.
Users
should not write to this bit, may produce undesired
results.
Bit[6] 8042 Reset:
1 = put the 8042 into reset
0 = take the 8042 out of reset
Bits[5:0] Test Mode: Reserved for SMSC. Users
should not write to this bit, may produce undesired
results.
C
TEST 1
Default = 0x00, on
VCC POR and
VTR POR
0x2D R/W
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
C
TEST 2
Default = 0x00, on
VCC POR and
VTR POR
0x2E R/W
Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired results.
C



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