| 전자부품 데이터시트 검색엔진 |
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LPC47M14X 데이터시트(PDF) 180 Page - SMSC Corporation |
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LPC47M14X 데이터시트(HTML) 180 Page - SMSC Corporation |
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180 / 205 page ![]() SMSC DS – LPC47M14X Page 180 Rev. 03/19/2001 Differential Data Lines 10% Rise Time 90% Fall Time tF tR 10% 90% VCRS FIGURE 10 – DATA SIGNAL RISE AND FALL TIME Full Speed: 4 to 20ns at CL = 50pF TxD+ TxD- Rs Rs C L C L Full-Speed Buffer Note: The output impedance of the buffer with a series resistance (Rs) is 28 Ω to 44Ω. FIGURE 11 – FULL SPEED LOAD TxD+ TxD- Rs Rs C L C L Low-Speed Buffer 15K 15K Low-Speed upstream port load CL = 50pF to 150pF TxD+ TxD- Rs Rs C L C L Low-Speed Buffer 3.6V 1.5K Low-Speed Downstream port load CL = 200pF to 600pF FIGURE 12 – LOW-SPEED PORT LOADS Data Line Crossover Point 50%Point of Initial Swing VSS VSS Driver End of Cable Round Trip Cable Delay 80ns (max) Receiver End of Cable One Way Cable Delay 30ns (max) FIGURE 13 – CABLE DELAY |
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