전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

CS61584A 데이터시트(PDF) 49 Page - Cirrus Logic

부품명 CS61584A
상세설명  DUAL T1/E1 LINE INTERFACE
PDF  54 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61584A 데이터시트(HTML) 49 Page - Cirrus Logic

Back Button CS61584A Datasheet HTML 45Page - Cirrus Logic CS61584A Datasheet HTML 46Page - Cirrus Logic CS61584A Datasheet HTML 47Page - Cirrus Logic CS61584A Datasheet HTML 48Page - Cirrus Logic CS61584A Datasheet HTML 49Page - Cirrus Logic CS61584A Datasheet HTML 50Page - Cirrus Logic CS61584A Datasheet HTML 51Page - Cirrus Logic CS61584A Datasheet HTML 52Page - Cirrus Logic CS61584A Datasheet HTML 53Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 49 / 54 page
background image
CS61584A
DS261PP5
49
DS261PP5
AV+
AGND
BGREF
TV+1
TGND1
RV+1
RGND1 DV+ DGND1:3
0.01
µF
TCLK1
TPOS1 (TDATA1)
TNEG1 (AIS1)
RCLK1
RPOS1 (RDATA1)
RNEG1 (BPV1)
TCLK2
TPOS2 (TDATA2)
TNEG2 (AIS2)
RCLK2
RPOS2 (RDATA2)
RNEG2 (BPV2)
Framer
Framer
TTIP1
TRING1
RTIP1
RRING1
TTIP2
TRING2
RTIP2
RRING2
Host Control
Power Supply
Clock Generator
Channel 2
Channel 1
transmit
transmit
3
0.1
µF
1
µF
+
0.1
µF
TV+2
TGND2
RV+2
RGND2
22
µF
+
0.1
µF
0.1
µF
0.1
µF
receive
R3
R4
receive
R1
R2
R3
4.99k
Ω
VCC
0.47
µF
0.47
µF
REFCLK 1XCLK
C1
C2
0.47
µF
0.47
µF
IPOL
P/S
CS
INT
SCLK
SDO
SDI
SPOL
Vcc
RESET
MODE
LOS[1:2]
2
T1
T2
T3
T4
1:N
1:N
1:N
1:N
ZTX[1:2]
2
Figure 28. Host Mode Serial Port Configuration
AV+
AGND
BGREF
TV+1
TGND1
RV+1
RGND1 DV+ DGND1:3
0.01
µF
TCLK1
TPOS1 (TDATA1)
TNEG1 (AIS1)
RCLK1
RPOS1 (RDATA1)
RNEG1 (BPV1)
TCLK2
TPOS2 (TDATA2)
TNEG2 (AIS2)
RCLK2
RPOS2 (RDATA2)
RNEG2 (BPV2)
Framer
Framer
TTIP1
TRING1
RTIP1
RRING1
TTIP2
TRING2
RTIP2
RRING2
Host Control
Power Supply
Clock Generator
Channel 2
Channel 1
transmit
transmit
3
0.1
µF
1
µF
+
0.1
µF
TV+2
TGND2
RV+2
RGND2
22
µF
+
0.1
µF
0.1
µF
0.1
µF
receive
R3
R4
receive
R1
R2
R3
4.99k
Ω
VCC
0.47
µF
0.47
µF
REFCLK 1XCLK
C1
C2
0.47
µF
0.47
µF
DTACK
P/S
CS
INT
Vcc
RESET
MODE
RD(DS)
AD[0:7]
ALE(AS)
WR(R/W)
BTS
SAD[4:7]
Vcc
74
T1
T2
T3
T4
1:N
1:N
1:N
1:N
Figure 29. Host Mode Parallel Port Configuration
CS61584A
DS261F1
49



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com