USB333X datasheet(53/85 Pages) MICROCHIP

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DS00001880A-page 53

USB333x

6.5.2

EXITING LOW POWER MODE

To exit Low Power Mode, the Link will assert STP. Upon the assertion of STP, the USB333x will begin its start-up pro-

cedure. After the PHY start-up is complete, the PHY will start the clock on CLKOUT and de-assert DIR. After DIR has

been de-asserted, the Link can de-assert STP when ready and start operating in Synchronous Mode. The PHY will auto-

matically set the SuspendM bit to a 1 in the Function Control register.

The value for TSTART is given in Table 4-3.

Should the Link de-assert STP before DIR is de-asserted, the USB333x will detect this as a false resume request and

return to Low Power Mode. This is detailed in Section 3.9.4 of the UTMI+ Low Pin Interface (ULPI) Specification Revision

1.1.

6.5.3

LINK POWER MANAGEMENT (LPM)

When the USB333x is operating with a Link capable of Link Power Management, the Link will place the USB333x in and

out of suspend rapidly to conserve power. The USB333x provides a fast suspend recovery that allows the USB333x to

meet the suspend recovery time detailed in the Link Power Management ECN to the USB 2.0 specification.

When the Link places the USB333x into suspend during Link Power Management, the LPM Enable bit of the HS Com-

pensation Register must be set to 1. This allows the USB333x to start-up in the time specified in Table 4-3.

6.5.4

INTERFACE PROTECTION

ULPI protocol assumes that both the Link and PHY will keep the ULPI data bus driven by either the Link when DIR is

low or the PHY when DIR is high. The only exception is when DIR has changed state and a turn around cycle occurs

for 1 clock period.

In the design of a USB system, there can be cases where the Link may not be driving the ULPI bus to a known state

while DIR is low. Two examples where this can happen is because of a slow Link start-up or a hardware reset.

6.5.4.1

Start up Protection

Upon start-up, when the PHY de-asserts DIR, the Link must be ready to receive commands and drive Idle on the data

bus. If the Link is not ready to receive commands or drive Idle, it must assert STP before DIR is de-asserted. The Link

can then de-assert STP when it has completed its start-up. If the Link doesn’t assert STP before it can receive com-

mands, the PHY may interpret the data bus state as a TX CMD and transmit invalid data onto the USB bus, or make

invalid register writes.

FIGURE 6-12:

EXITING LOW POWER MODE

DIR

CLK

DATA[7:0]

STP

TURN

AROUND

LOW

POWER MODE

DATA BUS IGNORED (SLOW LINK)

IDLE (FAST LINK)

IDLE

Slow Link Drives Bus

Idle and STP low

Fast Link Drives Bus

Idle and STP low

...

Note: Not to Scale

TSTART

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