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USB333X 데이터시트(PDF) 69 Page - Microchip Technology |
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USB333X 데이터시트(HTML) 69 Page - Microchip Technology |
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69 / 85 page ![]() 2009 - 2015 Microchip Technology Inc. DS00001880A-page 69 USB333x 7.1.3.5 USB IO & Power Management Address = 39-3Bh (read), 39h (write), 3Ah (set), 3Bh (clear) Field Name Bit Access Default Description Reserved 0 rd/w/s/c 0b Read only, 0. SwapDP/DM 1 rd/w/s/c 0b When asserted, the DP and DM pins of the USB PHY are swapped. This bit can be used to prevent crossing the DP/DM traces on the board. In UART mode, it swaps the routing to the DP and DM pins. In USB Audio Mode, it does not affect the SPK_L and SPK_R pins. UART RegOutput 3:2 rd/w/s/c 01b Controls the output voltage of the VBAT to VDD33 regulator in UART mode. When the PHY is switched from USB mode to UART mode regulator output will automatically change to the value specified in this register when TxdEn is asserted. 00: 3.3V 01: 3.0V (default) 10: 2.75V 11: 2.5V Note: When in USB Audio Mode the regulator will remain at 3.3V. When using this register it is recommended that the Link exit UART mode by using the RESETB pin. ChargerPullupEnDP 4 rd/w/s/c 0b Enables the RCD Pull-up resistor on the DP pin. (The pull-up is automatically enabled in UART mode) ChargerPullupEnDM 5 rd/w/s/c 0b Enables the RCD Pull-up resistor on the DM pin. (The pull-up is automatically enabled in UART mode) USB RegOutput 7:6 rd/w/s/c 00b Controls the output voltage of the VBAT to VDD33 regulator in USB mode. When the PHY is in Synchronous Mode, Serial Mode, or Low Power Mode, the regulator output will be the value specified in this register. 00: 3.3V (default) 01: 3.0V 10: 2.75V 11: 2.5V |
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