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T1024 데이터시트(PDF) 23 Page - Freescale Semiconductor, Inc |
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T1024 데이터시트(HTML) 23 Page - Freescale Semiconductor, Inc |
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23 / 49 page ![]() 2.12.1 Virtual banks The virtual bank feature is available when the NOR flash is connected to IFC_CS0_N. In that case, the value of VBANK[0:2] will be driven into three XOR gates, which toggle the MSB's of the NOR address, as shown in the below figure. DUT cfg_vbank[0:2] B_IFC IFC_A[30:8] IFC_A[7:5] NOR flash A[0:22] A[23:25] Figure 2-13. Virtual bank interface When VBANK[0:2]=000, the IFC_A[7:5] is not altered, and the NOR flash behaves normally. If VBANK[0:2]=100, the LB_A[5] is toggled and effectively swaps the top and bottom halves of the NOR flash. If program "A" was stored in the bottom half and program "B" in the top half then, while selecting different VBANK settings, “A” and “B” will get their VBANKs changed as given in the below table. Table 2-3. Virtual bank settings NOR zones (1/8 of 128 MB) VBANK 000 001 010 011 100 101 110 111 A A B C D E F G H B B A D C F E H G C C D A B G H E F D D C B A H G F E E E F G H A B C D F F E H G B A D C G G H E F C D A B H H G F E D C B A NOTE In the above table, the NOR flash has been partitioned into eight 16 MB zones, which can be arranged under the control of VBANK. Chapter 2 Architecture QorIQ T1024 Reference Design Board User Guide, Rev. 0, 04/2015 Freescale Semiconductor, Inc. 23 |
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