LT8253EUFDM datasheet(16/20 Pages) AD

16 / 20 page

LT8253/LT8253A

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

To prevent maximum junction temperature from being

exceeded, the input supply current must be checked oper-

ating in continuous mode at maximum VIN.

Top Gate MOSFET Driver Supply (CBST1, CBST2)

The top MOSFET drivers, TG1 and TG2, are driven between

their respective SW and BST pin voltages. The boost volt-

ages are biased from floating bootstrap capacitors CBST1

and CBST2, which are normally recharged through inter-

nal bootstrap diodes when the respective top MOSFET

is turned off. Both capacitors are charged to the same

voltage as the INTVCC voltage. The bootstrap capacitors

CBST1 and CBST2, need to store about 100 times the gate

charge required by the top switches A and D. In most

applications, a 0.1µF to 0.47µF, X5R or X7R dielectric

capacitor is adequate.

Programming VIN UVLO

A resistor divider from VIN to the EN/UVLO pin imple-

ments VIN undervoltage lockout (UVLO). The EN/UVLO

enable falling threshold is set at 1.220V with 13mV hyster-

esis. In addition, the EN/UVLO pin sinks 2.5µA when the

voltage on the pin is below 1.220V. This current provides

user programmable hysteresis based on the value of R1.

The programmable UVLO thresholds are:

VIN(UVLO+) = 1.233V •

+ R2

+ 2.5µA • R1

VIN(UVLO�) = 1.220V •

+ R2

Figure 8 shows the implementation of external shut-down

control while still using the UVLO function. The NMOS

grounds the EN/UVLO pin when turned on, and puts the

LT8253/LT8253A in shutdown with quiescent current less

than 2µA.

Figure 8. VIN Undervoltage Lockout (UVLO)

Programming Output Voltage and Thresholds

The LT8253/LT8253A have a voltage feedback pin FB

that can set the output voltage with R3 and R4 (Figure 9)

according to the following equation:

VOUT = 1V •

+ R4

In addition, the FB pin also sets output overvoltage

threshold, output power good thresholds, and output

short threshold. For an application with small output

capacitors, the output voltage may overshoot a lot during

load transient event. Once the FB pin hits its overvoltage

LT8253/LT8253A

VIN

RUN/STOP

CONTROL

(OPTIONAL)

8253A F08

EN/UVLO

GND

LT8253/LT8253A

VOUT

8352A F09

Figure 9. Feedback Resistor Connection

threshold 1.1V, the LT8253/LT8253A stop switching by

turning off TG1, BG1, TG2, and BG2. The output overvolt-

age threshold can be set as:

VOUT(OVP) = 1.1V •

+ R4

To provide the output short-circuit detection and protec-

tion, the output short falling threshold can be set as:

VOUT(SHORT) = 0.25V •

+ R4

Power GOOD (PGOOD) Pin

The LT8253/LT8253A provide an open-drain status pin,

PGOOD, which is pulled low when VFB is within ±10% of

the 1.00V regulation voltage. The PGOOD pin is allowed

to be pulled up by an external resistor to INTVCC or an

external voltage source of up to 6V.

LT8253EUFDM 데이터시트(PDF) 16 Page - Analog Devices

LT8253EUFDM 데이터시트(HTML) 16 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

데이터시트 다운로드

링크 URL