전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

WM8569GEDS/V 데이터시트(PDF) 26 Page - Wolfson Microelectronics plc

부품명 WM8569GEDS/V
상세설명  24-bit, 192kHz Stereo CODEC with Volume Control
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8569GEDS/V 데이터시트(HTML) 26 Page - Wolfson Microelectronics plc

Back Button WM8569GEDS/V Datasheet HTML 22Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 23Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 24Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 25Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 26Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 27Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 28Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 29Page - Wolfson Microelectronics plc WM8569GEDS/V Datasheet HTML 30Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 26 / 36 page
background image
WM8569
Product Preview
w
PP Rev 1.1 December 2005
26
DAC MASTER MODE SELECT
Control bit DACMS selects between audio interface Master and Slave Modes. In Master mode,
DACLRC and DACBCLK are outputs and are generated by the WM8569. In Slave mode DACLRC
and DACBCLK are inputs to WM8569.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001010
Interface Control
5
DACMS
0
DAC Audio Interface Master/Slave
Mode Select:
0: Slave mode
1: Master mode
MASTER MODE DACLRC FREQUENCY SELECT
In Master mode the WM8569 generates DACLRC and DACBCLK. These clocks are derived from the
master clock and the ratio of DACMCLK to DACLRC is set by DACRATE.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001010
Interface Control
8:6
DACRATE
[2:0]
010
Master Mode
MCLK:LRC Ratio Select:
000: 128fs (DAC only)
001: 192fs (DAC only)
010: 256fs
011: 384fs
100: 512fs
101: 768fs
ADC DIGITAL AUDIO INTERFACE CONTROL REGISTER
Interface format is selected via the ADCFMT[1:0] register bits:
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001011
Interface Control
1:0
ADCFMT[1:0]
00
Interface Format Select
00: Right justified mode
01: Left justified mode
10: I
2S mode
11: DSP mode A or B
The ADCIWL[1:0] bits are used to control the input word length.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001011
Interface Control
3:2
ADCIWL[1:0]
00
Input Word Length
00: 16 bit data
01: 20 bit data
10: 24 bit data
11: 32 bit data
Note: 32-bit right justified mode is not supported.
In all modes, the data is signed 2's complement.
ADC MASTER MODE SELECT
Control bit ADCMS selects between audio interface Master and Slave Modes. In Master mode
ADCLRC and ADCBCLK are outputs and are generated by the WM8569. In Slave mode ADCLRC
and ADCBCLK are inputs to WM8569.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001011
Interface Control
4
ADCMS
0
ADC Audio Interface
Master/Slave Mode Select:
0: Slave mode
1: Master mode



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com