Data Sheet

ADRF5132

Rev. B | Page 5 of 12

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

12

11

10

1

3

4

9

2

GND

RF1

NIC

GND

GND

RF2

NIC

GND

ADRF5132

TOP VIEW

(Not to Scale)

NOTES

1. NIC = NOT INTERNALLY CONNECTED. THESE PINS ARE NOT

CONNECTED INTERNALLY; HOWEVER, ALL DATA SHOWN

HEREIN WAS MEASURED WITH THESE PINS CONNECTED

TO RF/DC GROUND EXTERNALLY.

2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED

TO RF/DC GROUND.

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 4, 5, 6, 8, 9, 12, 13, 15

GND

Ground. See Figure 3 for the GND interface schematic.

2

RF1

RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.

3, 10

NIC

Not Internally Connected. These pins are not connected internally; however, all data shown herein

was measured with these pins connected to RF/dc ground externally.

7

RFC

RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required

on this pin.

11

RF2

RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.

14

digital input control voltage range in Table 1.

16

Supply Voltage.

EPAD

Exposed Pad. The exposed pad must be connected to RF/dc ground.

Table 5. Truth Table

Signal Path State

RFC to RF1

RFC to RF2

High

Off

On

Low

On

Off

INTERFACE SCHEMATICS

GND

Figure 3. Ground Interface

Figure 4. Control Interface