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ATXP032

DS-ATXP032–114I–4-2020

10.

Protection Commands and Features

10.1

Write Enable (06h)

The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status/Control register to a logic

“1” state. The WEL bit must be set before a Byte/Page Program, Erase, Program OTP Security Register, or Write

Status Register command can be executed. This makes the issuance of these commands a two step process,

thereby reducing the chances of a command being accidentally or erroneously executed. If the WEL bit in the

Status/Control register is not set prior to the issuance of one of these commands, then the command is not

executed.

To issue the Write Enable command, the CS pin must first be asserted and the 06h command must be clocked into

the device. No address bytes need to be clocked into the device, and any data clocked in after the command is

ignored. When the CS pin is deasserted, the WEL bit in the Status/Control register is set to a logic “1”. The

complete command must be clocked into the device before the CS pin is deasserted, and the CS pin must be

deasserted on a whole byte boundary (multiples of eight bits); otherwise, the device aborts the operation and the

state of the WEL bit does not change.

Figure 10-1. Write Enable

Figure 10-2. Write Enable in Octal Mode — SDR

MSB

Opcode

High Impedance

SCK

06h

Opcode

I/O7-0

SCK

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