DS20006554A datasheet(8/94 Pages) MICROCHIP

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ZL30260-ZL30263

Data Sheet

DS20006554A

Pin #

Name

Type

Description

General-Purpose I/O: After reset these pins are GPIO0, GPIO1 and GPIO2.

GPIOCR1 and GPIOCR2.GPIO2C configure these pins. Their states are

indicated in GPIOSR which has both real-time and latched status bits.

Note that when the power supply arrangement for the device has

VDDL=1.8V, during the interval between VDDH ramping and VDDL ramping

these pins can briefly behave as an output driving high.

TEST/GPIO3

I/O

Factory Test / General Purpose I/O 3

Factory Test: On the rising edge of RSTN the pin behaves as TEST. Factory

test mode is enabled when TEST is high. Typically TEST should be low on

the rising edge of RSTN, but see section 5.2 for some options where TEST

can be high on the rising edge of RSTN.

General-Purpose I/O: After reset this pin is GPIO3. GPIOCR2.GPIO3C

configures the pin. It state is indicated in GPIOSR which has both real-time

and latched status bits.

Note that when the power supply arrangement for the device has

VDDL=1.8V, during the interval between VDDH ramping and VDDL ramping

this pin can briefly behave as an output driving high.

IF0/CSN

I/O

Interface Mode 0 / SPI Chip Select (Active Low)

Interface Mode: On the rising edge of RSTN the pin behaves as IF0 and,

together with IF1, specifies the interface mode for the device. See section 5.2.

SPI Chip Select: After reset this pin is CSN. When the device is configured as

a SPI slave, an external SPI master must assert (low) CSN to access device

registers. When the device is configured as a SPI master (ZL30260, ZL30262

only), the device asserts CSN to access an external SPI EEPROM during

auto-configuration and then changes CSN to an input during normal

operation. CSN should not be allowed to float.

IF1/MISO

I/O

Interface Mode 1 / SPI Master-In-Slave-Out

Interface Mode: On the rising edge of RSTN the pin behaves as IF1 and,

together with IF0, specifies the interface mode for the device. See section 5.2.

SPI MISO: After reset this pin is MISO. When the device is configured as a

SPI slave, the device outputs data to an external SPI master on MISO during

SPI read transactions. When the device is configured as a SPI master

(ZL30260, ZL30262 only), the device receives data on MISO from an external

SPI EEPROM during auto-configuration.

SCL/SCLK

I/O

I2C Clock / SPI Clock

I2C Clock: When the device is configured as an I2C slave, an external I2C

master must provide the I2C clock signal on the SCL pin. In I2C mode this pin

should be externally pulled high by a 1k

 to 5k resistor.

SPI Clock: When the device is configured as a SPI slave, an external SPI

master must provide the SPI clock signal on SCLK. When the device is

configured as a SPI master (ZL30260, ZL30262 only), the device drives

SCLK as an output to clock accesses to an external SPI EEPROM during

auto-configuration.

SDA/MOSI

I/O

I2C Data / SPI Master-Out-Slave-In

I2C Data: When the device is configured as an I2C slave, SDA is the

bidirectional data line between the device and an external I2C master. In I2C

mode this pin should be externally pulled high by a 1k

 to 5k resistor.

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