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PC8374L 데이터시트(PDF) 80 Page - National Semiconductor (TI) |
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PC8374L 데이터시트(HTML) 80 Page - National Semiconductor (TI) |
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80 / 239 page ![]() 3.0 Device Architecture and Configuration (Continued) www.national.com 80 Revision1.1 6 R/W or RO FANOUT2_OTYPE (FANOUT2 Output Type). Controls the output buffer type of the FANPWM3 output. 0: Push-pull (default) 1: Open-drain 5RO FANOUT2_INV (FANOUT2 Output Invert). When this bit is set to 1, the signal at the FANPWM3 output is inverted. 0: Normal signal (default) 1: Inverted signal 4 R/W or RO FANOUT1_OTYPE (FANOUT1 Output Type). Controls the output buffer type of the FANPWM2 output. 0: Push-pull (default) 1: Open-drain 3RO FANOUT1_INV (FANOUT1 Output Invert). When this bit is set to 1, the signal at the FANPWM2 output is inverted. 0: Normal signal (default) 1: Inverted signal 2 R/W or RO FANOUT0_OTYPE (FANOUT0 Output Type). Controls the output buffer type of the FANPWM1 output. 0: Push-pull (default) 1: Open-drain 1RO FANOUT0_INV (FANOUT0 Output Invert). When this bit is set to 1, the signal at the FANPWM1 output is inverted. 0: Normal signal (default) 1: Inverted signal 0 R/W or RO INT_PU_EN (Internal Pull-Up Enable). Controls the internal pull-up resistors on the SWD signal. 0: Disabled 1: Enabled (default) Bit Type Description Winbond Electronics Corp. Advanced PC Product Center |
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