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MCP79522-I/MS 데이터시트(PDF) 37 Page - Microchip Technology |
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MCP79522-I/MS 데이터시트(HTML) 37 Page - Microchip Technology |
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37 / 58 page ![]() 2012-2022 Microchip Technology Inc. and its subsidiaries DS20002300D-page 37 MCP7951X/MCP7952X FIGURE 6-2: SRAM/RTCC READ SEQUENCE 6.1.3 CLEAR SRAM INSTRUCTION The CLRRAM instruction can be used to quickly clear the contents of SRAM to 0x00. The RTCC registers are not affected. The device is selected by pulling CS low. The 8-bit CLRRAM instruction is transmitted to the MCP795XX followed by an 8-bit dummy data byte. CS is driven high to end the operation (Figure 6-3). The value of the data byte is ignored. FIGURE 6-3: CLEAR SRAM SEQUENCE SO SI SCK CS 0 23456789 10 11 1 01 0 1 0 0 01 A7 A6 A5 A4 A1 A0 76543210 Data Out High-Impedance A3 A2 Address Byte 12 13 14 15 16 17 18 19 20 21 22 23 Instruction SO SI CS 9 1011 12131415 10 0 1 0 1 00 76 5 4 21 0 Instruction Dummy Data Byte High-Impedance SCK 0 234 567 1 8 3 |
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