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MCP79522-I/MS 데이터시트(PDF) 10 Page - Microchip Technology

부품명 MCP79522-I/MS
상세설명  Battery-Backed SPI Real-Time Clock/Calendar
PDF  58 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP79522-I/MS 데이터시트(HTML) 10 Page - Microchip Technology

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MCP7951X/MCP7952X
DS20002300D-page 10
 2012-2022 Microchip Technology Inc.and its subsidiaries
4.0
SPI BUS OPERATION
The MCP795XX is designed to interface directly with
the Serial Peripheral Interface (SPI) port of many of
today’s popular microcontroller families, including
Microchip’s PIC® microcontrollers. It may also interface
with microcontrollers that do not have a built-in SPI port
by using discrete I/O lines programmed properly in
software to match the SPI protocol.
The MCP795XX contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low for the entire operation.
Table 4-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses and data are transferred MSb first, LSb last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low.
TABLE 4-1:
INSTRUCTION SET SUMMARY
Instruction Name Instruction Format
Description
EEREAD
0000 0011
Read data from EEPROM array beginning at selected address
EEWRITE
0000 0010
Write data to EEPROM array beginning at selected address
EEWRDI
0000 0100
Reset the write enable latch (disable write operations)
EEWREN
0000 0110
Set the write enable latch (enable write operations)
SRREAD
0000 0101
Read STATUS register
SRWRITE
0000 0001
Write STATUS register
READ
0001 0011
Read data from RTCC/SRAM array beginning at selected address
WRITE
0001 0010
Write data to RTCC/SRAM array beginning at selected address
UNLOCK
0001 0100
Unlock the protected EEPROM block for a write operation
IDWRITE
0011 0010
Write data to the protected EEPROM block beginning at selected address
IDREAD
0011 0011
Read data from the protected EEPROM block beginning at the selected
address
CLRRAM
0101 0100
Clear all SRAM data to ‘0’



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