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MCP79522-I/MS 데이터시트(PDF) 11 Page - Microchip Technology |
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MCP79522-I/MS 데이터시트(HTML) 11 Page - Microchip Technology |
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11 / 58 page ![]() 2012-2022 Microchip Technology Inc. and its subsidiaries DS20002300D-page 11 MCP7951X/MCP7952X 5.0 FUNCTIONAL DESCRIPTION The MCP795XX is a highly-integrated Real-Time Clock/Calendar (RTCC). Using an on-board, low-power oscillator, the current time is maintained in hundredths of seconds, seconds, minutes, hours, day of week, date, month and year. The MCP795XX also features 64 bytes of general purpose SRAM, either 2 Kbits (MCP7952X) or 1 Kbit (MCP7951X) of EEPROM and 16 bytes of protected EEPROM. Two alarm modules allow interrupts to be generated at specific times with flexible comparison options. Digital trimming can be used to compensate for inaccuracies inherent with crystals. Using the backup supply input and an integrated power switch, the MCP795XX will automatically switch to backup power when primary power is unavailable, allowing the current time and the SRAM contents to be maintained. The timestamp module captures the time when primary power is lost and when it is restored. The RTCC configuration and STATUS registers are used to access all of the modules featured on the MCP795XX. 5.1 Memory Organization The MCP795XX features four different blocks of memory: the RTCC registers, general purpose SRAM, 2 Kbit EEPROM (1 Kbit for the MCP7951X) with software write-protect and protected EEPROM. The RTCC registers and SRAM share the same address space and are accessed through the READ and WRITE instructions. The EEPROM region is accessed using the EEREAD and EEWRITE instructions and the protected EEPROM is accessed using the IDREAD and IDWRITE instructions. Unused locations are not accessible. The MCP795XX will not return valid data if the address is out of range, as shown in the shaded region of the memory maps in Figure 5-1 and Figure 5-2. The RTCC registers are contained in addresses 0x00-0x1F. Table 5-1 shows the detailed RTCC register map. There are 64 bytes of user-accessible SRAM, located in the address range 0x20-0x5F. The SRAM is a separate block from the RTCC registers. All RTCC registers and SRAM locations are maintained while operating from backup power. FIGURE 5-1: MEMORY MAP FOR MCP7951X Time and Date SRAM (64 Bytes) Power-Fail/Power-Up Timestamps Alarm 1 Alarm 0 Configuration and Trimming 0x00 0x07 0x08 0x0B 0x0C 0x11 0x12 0x17 0x18 0x1F 0x20 0x5F 0x60 0xFF Unimplemented; device does not respond RTCC Registers/SRAM Protected EEPROM (8 Bytes) 0x00 0xFF 0x00 0x07 0x08 0x0F Lockable User ID (8 Bytes) EEPROM EUI-48/EUI-64 Node Address Unimplemented; mapped back to 0x00-0x7F 0x7F 0x80 EEPROM (128 Bytes) Protected EEPROM |
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