L9780 datasheet(26/56 Pages) STMICROELECTRONICS

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Diagnostic

L9780

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DocID026356 Rev 3

Diagnostic

5.1

Sensor short to battery

L9780 is able to detect and take actions when a short to battery condition happens on its

sensor pins. In particular voltage levels on pins INRC, SNS, SR, OUT1/2 and TG1/2 are

controlled. If INRC, SNS or SR pin exceeds the corresponding voltage threshold reported in

Table 13 (or one of TG/OUT pins exceeds VCCA + 30 mV), a possible sensor short to

battery condition is detected. Sensor short to battery diagnostic on SR pin is not active when

both PG1 and PG2 are OFF.

Possible sensor short to battery condition is confirmed by the logic (and reported in the SPI

output register) and the failure countermeasures are applied in the device only if the

duration of the fault is greater than a filter time defined as a multiple of the clock period

(possible filter times ranges are defined in Table 17); in other words, when the possible

sensor short to battery condition is detected, a logic counter starts and when the count

reaches the value defined in Table 17 the fault condition is considered validated. This

counter is reset when the possible short to battery fault is cleared and after every power on

reset.

As soon as a possible sensor short to battery condition is detected the VCCS pull-down

resistor is disabled immediately, without waiting any filter time; the pull-down will be

re enabled once the short to battery condition is removed and the SPI bits are cleared by the

user.

Actions

Once the sensor short to battery fault is validated (the duration of possible fault is greater

than the filter time) the following actions are taken:

Latch off PG1 and PG2;

Disable VCCS output current (all VCCS pins are in high impedance condition),

impedance test and charge balance switches;

Set the STBS1/ STBS2/ STBS3 bit in the SPI output register, according to the pin

where the fault has been detected (STBS3 in case of TG/OUT pins).

These actions remain valid until cleared by the user.

During short to battery condition, all pins compatible with this fault have to respect the

leakage current consumption specified in Table 14.

When the short to battery condition is cleared, VCCS, impedance test and charge balance

switches may be re enabled asynchronously from VCCS clock if their enable bits are =1. In

order to avoid this situation these functions should be disabled via SPI when a short to

battery fault is reported. When the fault is de asserted, these functions can be re enabled via

SPI.

For more details about SPI bits see Section 6.4.

5.2

INRC pin short to ground

The device is able to detect and take actions when a short to ground condition happens on

INRC pin. This detection is active only if STGINRC bit in SPI input register is set =1 and only

if the impedance test switch is disabled.

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