L9780 datasheet(39/56 Pages) STMICROELECTRONICS

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L9780

Digital interface description

6.4

SO pin is in tri state condition when CSN is negated. When CSN is asserted the MSB is the

first bit and LSB is the last bit of the word transmitted on SO.

SPI output register can be configured to report the configuration status of the device (with

conversion and fault detection results) or can be configured to report an echo of the

previous SPI input sequence. The first solution can be selected setting REG bit to ‘0’; the

second solution can be selected setting REG bit to ‘1’. The output word consists of 64 bit.

Here following the description of the SPI output register in both configurations.

6.4.1

SPI output register (status configuration)

Bit 63:

Bit not used.

Bit 62 - 60: VER[2..0]

Silicon version bits. These bits are updated after every silicon revision as follows:

Bit 59: REG

This bit represents the SO content, as follows:

REG=’0’ => SO status register;

REG=’1’ => SO input register.

Bit 58:

Bit not used.

62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

Table 7. Silicon version bits

VER2

VER1

VER0

Description

First silicon

Second silicon

Third silicon

L9780 데이터시트(PDF) 39 Page - STMicroelectronics