| 전자부품 데이터시트 검색엔진 |
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L9780 데이터시트(PDF) 35 Page - STMicroelectronics |
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L9780 데이터시트(HTML) 35 Page - STMicroelectronics |
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35 / 56 page ![]() DocID026356 Rev 3 35/56 L9780 Digital interface description 55 the beginning of the new measurement cycle. COMPSEL bit value reported in the output register is the value used in the last measurement cycle. For correct use of this bit, refer also to Section 5.5.3. Default state for this bit after power on reset: 0. Bit 50: CLAMPEN This bit enables (CLAMPEN=’1’) or disables (CLAMPEN=’0’) VCCS voltage clamp. If the device receives an SPI command in order to modify CLAMPEN bit in the middle of a measurement cycle, it stores the new information and applies it at the beginning of the new measurement cycle. CLAMPEN bit value reported in the output register is the value used in the last measurement cycle. Default state for this bit after power on reset: 0. Bit 49: CLAMPCL This bit selects the clamp voltage input pin as follows: CLAMPCL=’0’ => selected pin CL1; CLAMPCL=’1’ => selected pin CL2. If the device receives an SPI command in order to modify CLAMPCL bit in the middle of a measurement cycle while VCCS is disabled, it stores the new information and applies it at the beginning of the new measurement cycle. CLAMPCL bit value reported in the output register is the value used in the last measurement cycle. For correct use of this bit, refer also to Section 5.5.3. Default state for this bit after power on reset: 0 Bit 48: CLAMPSIM This bit selects symmetric or asymmetric voltage clamp limit range as follows: CLAMPSIM=’0’ => symmetric clamp limit range; CLAMPSIM=’1’ => asymmetric clamp limit range. For the meaning of symmetric/asymmetric range refer to VCCS analog description in section 5.9. If the device receives an SPI command in order to modify CLAMPSIM bit in the middle of a measurement cycle while VCCS is disabled, it stores the new information and applies it at the beginning of the new measurement cycle. CLAMPSIM bit value reported in the output register is the value used in the last measurement cycle. For correct use of this bit, refer also to Section 5.5.3. Default state for this bit after power on reset: 0 Bit 47: CLEARFLT This bit is used to clear latched faults when the origin of the fault is removed, as follows: CLEARFLT=’0’ => no action; CLEARFLT=’1’ => clears faults after CSN bit returns to ‘1’. |
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