| 전자부품 데이터시트 검색엔진 |
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L9966 데이터시트(PDF) 9 Page - STMicroelectronics |
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L9966 데이터시트(HTML) 9 Page - STMicroelectronics |
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9 / 122 page ![]() 5 Device operation The L9966 can enter several operating ranges according to the UBSW voltage, RST pin level, channel state (for polling) and internal fault conditions. 5.1 Absolute maximum rating The component withstands all the following stimuli without any damage or latch-up. Exceeding any of these values for extended period may lead to component damage. All voltages are related to GND. Table 3. Absolute maximum rating Pin Name Pin Class Pin Direction Min Voltage Max Voltage Max Pin Current IO_1 … IO_12 A IO -3 V(1) 58 V 30 mA IO_13 … IO_15 D IO -3 V 58 V 30 mA UBSW S S -0.3 V 58 V 400 mA VDD5 I S -0.3 V 5.5 V 100 mA VDD5REF I I -0.3 V 5.5 V 1 mA VI5V I I -0.3 V 5.5 V 1 mA VIX I I -0.3 V 36 V 1 mA VT5V I O -0.3 V 5.5 V 1 mA VTX I O -0.3 V 36 V 1 mA RR1 … RR3 I I -0.3 V 5.5 V 25 mA CS, SCLK, MOSI, MISO I IO -0.3 V 5.5 V 5 mA CTRL_CFG I I -0.3 V 5.5 V 1 mA INT I O -0.3 V 5.5 V 1 mA WAKE I O -0.3 V 58 V 20 mA RST I I -0.3 V 5.5 V 1 mA SYNC I I -0.3 V 5.5 V 5 mA AOX I O -0.3 V 5.5 V 1 mA GND S S 0 0 1 A R_GND I I -0.3 V 0.3 V 1 mA VRSP, VRSN A I -0.3 V 3.6 V 20 mA VRSout I O -0.3 V 5.5 V 1 mA SENT1-4 I O -0.3 V 5.5 V 1 mA 1. IO[4:1] allows down to -30 V transient in case UBSW no greater than 24 V max. 5.2 Latch-up trials Latch-up tests performed according to JEDEC 78 class 2 Level A. L9966 Device operation DS12459 - Rev 10 page 9/122 |
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