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ES9218P 데이터시트(PDF) 11 Page - ESS Technology,Inc

부품명 ES9218P
상세설명  32-bit Stereo Low Power DAC with Headphone Amplifier, Analog Volume Control, and Output Switch
PDF  101 Pages
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제조업체  ESS [ESS Technology,Inc]
홈페이지  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9218P 데이터시트(HTML) 11 Page - ESS Technology,Inc

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ES9218P Datasheet
CONFIDENTIAL ADVANCE INFORMATION 1.8
December 6, 2018
11
ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801
Functional Description
Sample Rate Notation
Mode
fs (target sample rate)
FSR (raw sample rate)
PCM Normal Mode
Frame Clock Rate
Frame Clock Rate
PCM OSF Bypass Mode
Frame Clock Rate / 8
Frame Clock Rate
DSD Mode
DSD Clock (DATA_CLK)
DSD data rate
PCM Pin Connections
The clock requirements in System Clock XI(MCLK) must be met for proper operation in PCM mode.
Pin Name
Description
DATA_2
2-channel PCM serial data
DATA_1
Frame clock
DATA_CLK
Bit clock
DSD Pin Connections
The clock requirements in System Clock XI(MCLK) must be met for proper operation in DSD mode.
Pin Name
Description
DATA_2
DSD Data mapped to Left Channel by default.
DATA_1
DSD Data mapped to Right Channel by default.
DATA_CLK
Bit clock
DoP Pin Connections
The clock requirements in System Clock XI(MCLK) must be met for proper operation in DoP mode.
Pin Name
Description
DATA_2
2-channel DSD data encoded into PCM frames according to the
DoP standard.
DATA_1
Frame clock
DATA_CLK
Bit clock



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