ST7LUS5 datasheet(29/124 Pages) STMICROELECTRONICS

29 / 124 page

ST7LUS5, ST7LU05, ST7LU09

Supply, reset and clock management

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6.2

6.2.1

Main clock control/status register (MCCSR)

6.2.2

RC control register (RCCR)

MCCSR

Reset value: 0000 0000 (00h)

654

Reserved

SMS

-R/W

Table 7.

MCCSR register description

Bit

Name

Function

7:1

Reserved, must be kept cleared.

0SMS

Slow Mode select

This bit is read/write by software and cleared by hardware after a reset. This bit

selects the input clock fOSC or fOSC/32.

0: Normal mode (fCPU = fOSCC)

1: Slow mode (fCPU = fOSCC/32)

RCCR

Reset value: 1111 1111 (FFh)

654

CR[9:2]

R/W

Table 8.

RCCR register description

Bit

Name

Function

7:0 CR[9:2]

RC Oscillator Frequency Adjustment Bits

These bits, as well as CR[1:0] bits in the SICSR register must be written

immediately after reset to adjust the RC oscillator frequency and to obtain the

required accuracy. The application can store the correct value for each voltage

range in Flash memory and write it to this register at start-up.

00h = maximum available frequency

FFh = lowest available frequency

Note: To tune the oscillator, write a series of different values in the register until the

correct frequency is reached. The fastest method is to use a dichotomy starting with

80h.

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