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ST20-GP6 데이터시트(PDF) 8 Page - STMicroelectronics

부품명 ST20-GP6
상세설명  GPS PROCESSOR
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST20-GP6 데이터시트(HTML) 8 Page - STMicroelectronics

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Figure 2.1 ST20-GP6 architectural block diagram
Memory subsystem
The ST20-GP6 on-chip memory system provides 60 Mbytes/s internal data bandwidth, supporting
pipelined 2-cycle internal memory access at 30 ns cycle times. The ST20-GP6 memory system
consists of SRAM, ROM and a programmable external memory interface (EMI).
GPS
radio
12 channel GPS
Low
controller
power
Real time
clock
Programmable
memory
interface
128K
64K
SRAM
ST20-GP6
ST20
CPU
Interrupt
controller
Serial
communications
Parallel
input/output
.
2 UART
hardware DSP
16
Interrupts
User position
output in
ASCII
.
.
ROM
Diagnostic
control unit
Test access
port
System
services
Reset
Clock



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