ST20-GP6 datasheet(104/123 Pages) STMICROELECTRONICS

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ST20-GP6

104/123

DC speciﬁcations

Symbol Parameter

Min

Typical Max

Units Notes

VDD

Positive supply voltage during normal operation.

3.0

3.3

3.6

VDDoff

Positive supply voltage when device is off but real time

clock is running.

-0.3

0.3

VDDrtc

Voltage at

RTCVDD pin referred to GND.

2.4

3.3

3.6

Normal

operation

VDDrtc

Voltage at

RTCVDD pin referred to GND.

1.4

3.3

3.6

VDDoff,

notRST

set to 1

VDDdiff

VDD-VDDrtc during normal operation and

notRST set

to 1.

-0.6

0.6

Vih

Input logic 1 for CMOS pinsa (except

notRST pin) and

TTL pinsb.

a. CMOS pins: LowPowerClockIn, LowPowerClockOsc, LowPowerStatus, notWdReset, WdEnable, ClockIn,

SpeedSelect0-1, notRST, TriggerOut, TriggerIn, Interrupt0-1, EnableIntROM, BusWidth, TXD0-1, RXD0-1,

PIO0[0-7] and PIO1[0-7], TDI, TMS, TCK, notTRST, TDO, GPSIF.

b. TTL pins: MemAddr1-19, MemData0-15, MemWait, MemReadnotWrite, notMemOE, notMemCE0-3,

notMemBE0-1

2.0

VDD + 0.5

Input logic 1 for

notRST pin.

2.4

VDD + 0.5

Vil

Input logic 0 for CMOS pins.

Input logic 0 for TTL pins.

-0.5

0.8

Iin

Input current to input pins.

-10

µA

Ioz

Off state digital output current.

-50

µA

Vohdc

Output logic 1

2.4

VDD

Voldc

Output logic 0

0.4

Cin

Input capacitance (input only pins).

Cout

Output capacitance and capacitance of bidirectional

pins.

615

Pop

Operational power consumption under heavy device

activity. fclk of 16.368 MHz and

SpeedSelect set to

PLL operation (x1). No external memory used.

100mW 1W

Papp

Operational power consumption under ‘typical’ device

activity. fclk of 16.368 MHz and

SpeedSelect set to

PLL operation (x2). External memory used.

150mW 1W

Pstby

Operational power during stand-by.

10mW

Prtc

Operational power for the real time clock and 16K

RAM, supplied through the

RTCVDD pin.

µW

µW5

Table 18.3 DC speciﬁcation

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