HC05V7GRSSLASHD datasheet(27/170 Pages) NXP

27 / 170 page

SECTION 2: MEMORY MAP

Page 13

MC68HC05V7 Specification Rev. 1.0

SECTION 2

MEMORY MAP

2.1

SINGLE-CHIP MODE MEMORY MAP

When the MC68HC05V7 is in the Single-Chip Mode the I/O and peripherals, user RAM,

EEPROM and user ROM are all active as shown in Figure 2-1.

Figure 2-1:

MC68HC05V7 Single-Chip Mode Memory Map

2.2

I/O AND CONTROL REGISTERS

The I/O and Control Registers reside in locations $0000-$003F. The overall organization of

these registers is shown in Figure 2-2. The bit assignments for each register are shown in

0704

0703

User Vectors ROM

16 Bytes

Selfcheck/E2test

ROM 512 Byes

16383

16368

16367

Stack

(64 Bytes)

User RAM

192 Bytes

Reset Vector (Low Byte)

Reset Vector (High Byte)

SWI Vector (Low Byte)

SWI Vector (High Byte)

IRQ Vector (Low Byte)

IRQ Vector (High Byte)

16-Bit Timer Vector (Low Byte)

16-Bit Timer Vector (High Byte)

$3FF7

$3FF8

$3FF9

$3FFA

$3FFB

$3FFC

$3FFD

$3FFE

$3FFF

MDLC (Low Byte)

$003F

$0000

$00C0

$00BF

0191

0192

I/O

64 Bytes

0064

0063

0000

$3FFF

$3FF0

$3FEF

$0040

$003F

$0000

User ROM

10208 Bytes

I/O

Registers

64 bytes

(see

Figure 2-

$3FF6

MDLC (High Byte)

$3FF3

8-Bit Timer (Low Byte)

$3FF4

SPI (High Byte)

$3FF5

SPI (Low Byte)

$3FF2

8-Bit Timer (High Byte)

$3FF1

unused

$3FF0

COP Watchdog Timer

$1600

$15FF

User EEPROM

128 Bytes

5632

5631

Unused

4928 Bytes

$02C0

$02BF

$0240

$023F

0575

0576

User RAM

(128 Bytes)

Unused

128 Bytes

$01BF

$01C0

0447

0448

$00FF

$0100

0255

0256

16352

16351

$3FE0

$3FDF

Selfcheck Vectors

ROM 16 Bytes

$17FF

$1800

6143

6144

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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