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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HC705RC17GRS/D 데이터시트(PDF) 32 Page - NXP Semiconductors |
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HC705RC17GRS/D 데이터시트(HTML) 32 Page - NXP Semiconductors |
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32 / 126 page  Central Processor Unit (CPU) General Release Specification MC68HC705RC17 — Rev. 2.0 Central Processor Unit (CPU) 3.3 CPU Registers The MCU contains five registers as shown in Figure 3-1. The interrupt stacking order is shown in Figure 3-2. Figure 3-1. Programming Model Figure 3-2. Stacking Order A 70 X 70 HI N Z C CCR 11 SP 70 PC 13 0 ACCUMULATOR INDEX REGISTER PROGRAM COUNTER STACK POINTER CONDITION CODE REGISTER 0 0 0 0 0 13 0 INDEX REGISTER PCL ACCUMULATOR CONDITION CODE REGISTER PCH 11 1 70 STACK I N T E R R U P T DECREASING UNSTACK R E T U R N INCREASING NOTE: Since the stack pointer decrements during pushes, the PCL is stacked first, followed by PCH, etc. Pulling from the stack is in the reverse order. MEMORY ADDRESSES MEMORY ADDRESSES Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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