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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HC705RC17GRS/D 데이터시트(PDF) 33 Page - NXP Semiconductors |
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HC705RC17GRS/D 데이터시트(HTML) 33 Page - NXP Semiconductors |
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33 / 126 page  Central Processor Unit (CPU) Accumulator MC68HC705RC17 — Rev. 2.0 General Release Specification Central Processor Unit (CPU) 3.4 Accumulator The accumulator (A) is a general-purpose 8-bit register used to hold operands and results of arithmetic calculations or data manipulations. 3.5 Index Register The index register (X) is an 8-bit register used for the indexed addressing value to create an effective address. The index register may also be used as a temporary storage area. 3.6 Condition Code Register The condition code register (CCR) is a 5-bit register in which the H, N, Z, and C bits are used to indicate the results of the instruction just executed, and the I bit is used to enable or disable interrupts. These bits can be individually tested by a program, and specific actions can be taken as a result of their state. Each bit is explained in the following paragraphs. Half Carry (H) This bit is set during ADD and ADC operations to indicate that a carry occurred between bits 3 and 4. Interrupt (I) When this bit is set, the timer and external interrupt are masked (disabled). If an interrupt occurs while this bit is set, the interrupt is latched and processed as soon as the I bit is cleared. 70 A 70 X CCR HIN Z C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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