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M58LR128FT 데이터시트(PDF) 42 Page - STMicroelectronics |
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M58LR128FT 데이터시트(HTML) 42 Page - STMicroelectronics |
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42 / 82 page ![]() M58LR128FT, M58LR128FB 42/82 Table 21. Asynchronous Read AC Characteristics Note: 1. Sampled only, not 100% tested. 2. G may be delayed by up to tELQV - tGLQV after the falling edge of E without increasing tELQV. Symbol Alt Parameter M58LR128FT/B Unit 85 95 tAVAV tRC Address Valid to Next Address Valid Min 85 95 ns tAVQV tACC Address Valid to Output Valid (Random) Max 85 95 ns tAVQV1 tPAGE Address Valid to Output Valid (Page) Max 25 25 ns tAXQX (1) tOH Address Transition to Output Transition Min 0 0 ns tELTV Chip Enable Low to Wait Valid Max 14 17 ns tELQV (2) tCE Chip Enable Low to Output Valid Max 85 95 ns tELQX (1) tLZ Chip Enable Low to Output Transition Min 0 0 ns tEHTZ Chip Enable High to Wait Hi-Z Max 17 20 ns tEHQX (1) tOH Chip Enable High to Output Transition Min 0 0 ns tEHQZ (1) tHZ Chip Enable High to Output Hi-Z Max 17 20 ns tGLQV (2) tOE Output Enable Low to Output Valid Max 20 25 ns tGLQX (1) tOLZ Output Enable Low to Output Transition Min 0 0 ns tGLTV Output Enable Low to Wait Valid Max 14 17 ns tGHQX (1) tOH Output Enable High to Output Transition Min 0 0 ns tGHQZ (1) tDF Output Enable High to Output Hi-Z Max 17 20 ns tGHTZ Output Enable High to Wait Hi-Z Max 17 20 ns tAVLH tAVADVH Address Valid to Latch Enable High Min 7 10 ns tELLH tELADVH Chip Enable Low to Latch Enable High Min 10 10 ns tLHAX tADVHAX Latch Enable High to Address Transition Min 7 10 ns tLLLH tADVLADVH Latch Enable Pulse Width Min 7 10 ns tLLQV tADVLQV Latch Enable Low to Output Valid (Random) Max 85 95 ns |
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