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AT25QL641 데이터시트(PDF) 38 Page - Renesas Technology Corp

부품명 AT25QL641
상세설명  SPI Serial Flash Memory with Dual I/O, Quad I/O, QPI Support
PDF  80 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

AT25QL641 데이터시트(HTML) 38 Page - Renesas Technology Corp

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DS-AT25QL641-130 Rev. G
Page 38
Sep 14, 2022
© 2022 Renesas Electronics
AT25QL641 Datasheet
8.16 Quad Page Program (33h)
The Quad Page Program command is to program the memory as being 0 at previously erased memory areas.
The Quad Page Program requires four pins: I/O0, I/O1, I/O2, and I/O3, as address and data inputs, which can
improve performance. A system using a faster clock speed does not get more benefit for the Quad Page Program
as the required internal page program time is far more than the time data clock-in.
To use Quad Page Program command, the Quad Enable bit must be set. A Write Enable command must be
executed before the device accepts the Quad Page Program command (Status Register-1, WEL = 1). The
command is initiated by driving the CS pin low then sending the command code 33h followed by a 24-bit address
(A23-A0) and at least one data, into the I/O pins. The CS pin must be held low for the entire length of the
command while data is being sent to the device. All other functions of Quad Page Program command are the
same as the standard Page Program command. (See Figure 27 and Figure 28.)
Figure 27. Quad Page Program Command (SPI mode)
IO
IO
IO
IO
SCK
CS
IO
IO
IO
SCK
CS
0
123
45
6
7
8
0
9
1
10 11 12 13
13 14 15 16 17 18 19
4
5
12
16
20
0
4
8
13
17
21
1
5
9
14
18
22
2
6
10
15
19
23
3
7
11
Mode 3
Mode 0
Mode 3
Mode 0
2
6
0
1
4
5
2
6
0
1
4
5
2
6
Command
33h
A23-16
A15-8
A7-0
Byte 1
Byte 2
Byte 3
0
1
4
5
2
6
0
1
4
5
2
6
Byte 253 Byte 254
0
1
4
5
2
6
0
1
4
5
2
6
Byte 255 Byte 256
MSB
MSB
MSB



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