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RA4E2 데이터시트(PDF) 76 Page - Renesas Technology Corp |
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RA4E2 데이터시트(HTML) 76 Page - Renesas Technology Corp |
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76 / 90 page ![]() 2.11 Serial Wire Debug (SWD) Table 2.46 SWD Parameter Symbol Min Typ Max Unit Test conditions SWCLK clock cycle time tSWCKcyc 40 — — ns Figure 2.67 SWCLK clock high pulse width tSWCKH 15 — — ns SWCLK clock low pulse width tSWCKL 15 — — ns SWCLK clock rise time tSWCKr — — 5 ns SWCLK clock fall time tSWCKf — — 5 ns SWDIO setup time tSWDS 8 — — ns Figure 2.68 SWDIO hold time tSWDH 8 — — ns SWDIO data delay time tSWDD 2 — 28 ns SWCLK tSWCKH tSWCKcyc tSWCKL Figure 2.67 SWD SWCLK timing RA4E2 Datasheet 2. Electrical Characteristics R01DS0413EJ0110 Rev.1.10 Feb 28, 2023 Page 76 of 90 |
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