FS6407 datasheet(46/111 Pages) NXP

46 / 111 page

NXP Semiconductors

FS6407/FS6408

Figure 29. Behavior at low VSUP (buck boost configuration)

6.7.1.3

Light load condition

In order to improve the converter efficiency and avoid any unwanted output voltage increase, the VPRE voltage regulator operates in

Pulse Skipping mode during light load condition.

The transition between Normal mode and Pulse Skipping mode is based on the comparison between the error amplifier output (EA_out)

and pre-defined thresholds VPRE_LL_H and VPRE_LL_L. When the error amplifier output reaches VPRE_LL_L, VPRE high-side transistor is

switched OFF. When the error amplifier output reaches VPRE_LL_H, VPRE high-side transistor is switched ON again for the next switching

period (Figure 30).

Figure 30. Description of light load condition

Buck_Boost

Mask

VSUP

VSUP_UV_7

VSUP_UV_L

Buck

Boost

Buck

VPRE_EN

VPRE

INTB

RSTB

VCORE

VCORE_FB_UV * ((R3+R4)/R4)

EA_out

Vpre_LL_H

Vpr e_L L_L

Light Load

fla g

HS Ga te

drive

Ref

Vp re_LL_L

VPRE

VSUP1/2

SW_PRE

Error Amplifier

VPRE HS

Driver

Light Load

Comparator

(Hyst 20mV)

GN D

EA_out

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